1. Field of the Invention
The disclosed embodiments of the present invention relate to a flash memory, and more particularly, to a method for reading data from a block of a flash memory and related memory apparatus.
2. Description of the Prior Art
A flash memory can be used to store data through electrical erase and write/program, and is widely applied in the field of memory cards, solid-state drives, portable multi-media players, etc. Because the flash memory is a non-volatile memory, there is no need for extra power to maintain what is stored in the flash memory. In addition, the flash memory provides high speed data access and excellent vibration resistance, which explains its popularity.
The flash memories can be classified into two categories: NOR flash memories and NAND flash memories. For the later, the erase time and program time is shorter, and the die size of each memory unit is smaller. Thus, compared with the NOR flash memory, the NAND flash memory permits higher storage density and lower cost per bit. Generally speaking, the flash memory consists of memory unit arrays, wherein each memory unit is implemented using a floating-gate transistor in practice, and the threshold voltage of the memory unit is configured by properly controlling charge number at a floating gate of the floating-gate transistor to thereby store a single-bit data or a multi-bit data. Therefore, when one or more predetermined control gate voltages are imposed at the control gate of the floating-gate transistor, a conduction status of the floating-gate transistor will indicate one or more binary digits stored in the floating-gate transistor.
However, due to certain reasons, the original charge number of the flash memory may be affected/disturbed. For instance, the disturbance may come from write/program disturbance, read disturbance and/or retention disturbance. In a case where a NAND flash memory has memory units storing at least one bit respectively, a physical page includes multiple logical pages, and each logical page is read by applying one or more control gate voltages. For instance, a flash memory unit used for storing a 3-bit data should has one of 8 states (i.e., 8 electrical charge levels) corresponding to different charge numbers. However, due to program/erase count (P/E count) and/or retention time, the threshold voltage distribution of memory units in the flash memory unit may change. Therefore, using the original configurations of the control gate voltages to read stored information of the flash memory unit may fail to correctly obtain the stored information.
Changes or offsets of the threshold voltage distribution of the memory units of the flash memory unit often cause read errors. Fortunately, this could be overcome/mitigated by error correction codes (ECCs). However, after repeated read and write of the flash memory unit, the noise occurrence in the flash memory unit no longer has a Gaussian noise distribution. Instead, the occurrence probability of stronger noise (i.e. the threshold voltage distribution of the memory unit has a larger change or offset) is higher than that of noise that is relatively weak (i.e. the threshold voltage distribution of the memory unit has a smaller change or offset). Therefore, an error correction code with more bits is required to deal with this case, which consumes the flash memory capacity inevitably.